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Abstract
This paper describes the advantages, the mathematical model and the problems
of practical use of discrete M- sequences in modern, contemporary CPLD based
devices. Two examples of large length M- sequences implemented in Xilinx XC9572
based devices and its ABEL code is given.
It is well known, that due to its excellent noise resistance the so called “large base signals “(LBS) plays an important role in many areas like digital control and communications. Usually, the LBS becomes a signal carrier, modulated with pseudo random code sequences (PRCS). As a modulated sequences the Barker, Legandre, Hall or “M-sequences” can be used. Among them, due to its easy way for generation, the “M-sequences” are nominated for a sequence with most often practical implementation. In details, the features of “M-sequences” can be found [1].
From mathematical point of view, the “M-sequences” are described by recurrent formulas like:
,
Here
,
and the initial statement of the sequences can be every one except the zero.
Under the special choice, of coeficients
, the equality (1) guarantee a “M-sequence” with maximum length of
elements. A classical way for hardware mode of “M-sequence” generation is the
use of shift registers (fig. 1).
This approach can be described mathematically via
N-Th order polinom. It is shown [2], that in order to support the maximum length
of M-sequences, the polinom should be prime (should be divisor of
only
if
). For an example, such kind
of polynom
can be used. The
order and coeficients of some of the more oftn used for a practical M-sequences
generation polimomials a given in tabl.1.
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1
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10
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1
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8
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100011011
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51
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2
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111
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3
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100011101
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255
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3
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1011
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7
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100101011
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255
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1101
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7
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100101101
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255
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||
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4
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10011
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15
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100111001
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17
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11111
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5
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100111111
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85
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||
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5
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100101
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31
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101001101
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255
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101001
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31
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101011111
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255
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||
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101111
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31
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101100011
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255
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||
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110111
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31
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101100101
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255
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||
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6
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1000011
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63
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101101001
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255
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1001001
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9
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101110001
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255
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||
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1010111
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21
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101110111
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85
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1011011
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63
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101111011
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85
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1100001
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63
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110000111
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255
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1100111
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63
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110001011
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85
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1101101
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63
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110001101
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255
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7
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10000011
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127
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110011111
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51
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10001001
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127
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110100011
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85
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||
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10001111
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127
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110101001
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255
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10010001
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127
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110110001
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51
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||
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10100111
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127
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110111101
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85
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10101011
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127
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111000011
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255
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10111001
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127
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111001111
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255
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10111111
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127
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111010111
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17
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11000001
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127
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111011101
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85
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11001011
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127
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111100111
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255
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11010011
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127
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111110011
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51
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11010101
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127
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111110101
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255
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11100101
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127
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111111001
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85
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In order to achieve the the best parameters of
practical implementations of the M-sequences, the contemporary in system programmable
CPLD type integral circuits can be used. In order to illustrate the use and
implementation of these kind of modern elements, the XILINX XC9500 family was
chosen [3]. The base parameters of this family are shown in table. 2.
| Common characteristics | |||||||
| XC9536 | XC9572 | XC95108 | XC95144 | XC95216 | XC95288 | ||
| Macro sells |
36
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72
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108
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144
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216
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288
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| Logic elements |
800
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1600
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2400
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3200
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4800
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6400
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| Triggers |
36
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72
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108
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144
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216
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288
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| System frequency | MHz |
100
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83
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83
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83
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67
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56
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For a generation of a M-sequences with large length, equal to 216-1 a 16 bit shift register was generated. It was implemented in XC9572 CPLD device. The listing of the fitter result and ABEL Implemented equations are given below.
XACT: version M1.5.25 Xilinx Inc.
Fitter Report
Design Name: mm
Fitting Status: Successful Date: 4-10-2000, 8:38AM
**************************** Resource Summary ****************************
Design Device Macrocells Product Terms Pins
Name Used Used Used Used
mm XC9572-10-PC84 16 /72 ( 22%) 17 /360 ( 4%) 2 /69 ( 2%)
-----------------------------------------------------------------;;
; Implemented Equations.
MSEQ := "QQ<14>".LFBK
MSEQ.CLKF = CLK ;FCLK/GCK
MSEQ.PRLD = GND
/"QQ<0>" := "QQ<0>".D1 Xor "QQ<0>".D2
"QQ<0>".D1 = "QQ<1>".LFBK
"QQ<0>".D2 = MSEQ.LFBK
"QQ<0>".CLKF = CLK ;FCLK/GCK
"QQ<0>".PRLD = GND
"QQ<10>" := "QQ<9>".LFBK
"QQ<10>".CLKF = CLK ;FCLK/GCK
"QQ<10>".PRLD = GND
"QQ<11>" := "QQ<10>".LFBK
"QQ<11>".CLKF = CLK ;FCLK/GCK
"QQ<11>".PRLD = GND
"QQ<12>" := "QQ<11>".LFBK
"QQ<12>".CLKF = CLK ;FCLK/GCK
"QQ<12>".PRLD = GND
"QQ<13>" := "QQ<12>".LFBK
"QQ<13>".CLKF = CLK ;FCLK/GCK
"QQ<13>".PRLD = GND
"QQ<14>" := "QQ<13>".LFBK
"QQ<14>".CLKF = CLK ;FCLK/GCK
"QQ<14>".PRLD = GND
"QQ<1>" := "QQ<0>".LFBK
"QQ<1>".CLKF = CLK ;FCLK/GCK
"QQ<1>".PRLD = GND
"QQ<2>" := "QQ<1>".LFBK
"QQ<2>".CLKF = CLK ;FCLK/GCK
"QQ<2>".PRLD = GND
"QQ<3>" := "QQ<2>".LFBK
"QQ<3>".CLKF = CLK ;FCLK/GCK
"QQ<3>".PRLD = GND
"QQ<4>" := "QQ<3>".LFBK
"QQ<4>".CLKF = CLK ;FCLK/GCK
"QQ<4>".PRLD = GND
"QQ<5>" := "QQ<4>".LFBK
"QQ<5>".CLKF = CLK ;FCLK/GCK
"QQ<5>".PRLD = GND
"QQ<6>" := "QQ<5>".LFBK
"QQ<6>".CLKF = CLK ;FCLK/GCK
"QQ<6>".PRLD = GND
"QQ<7>" := "QQ<6>".LFBK
"QQ<7>".CLKF = CLK ;FCLK/GCK
"QQ<7>".PRLD = GND
"QQ<8>" := "QQ<7>".LFBK
"QQ<8>".CLKF = CLK ;FCLK/GCK
"QQ<8>".PRLD = GND
"QQ<9>" := "QQ<8>".LFBK
"QQ<9>".CLKF = CLK ;FCLK/GCK
"QQ<9>".PRLD = GND
**************************** Device Pin Out ****************************
Device : XC9572-10-PC84
M
T T C G T T T T T T S T T T T T T V T T T
I I L N I I I I I I E I I I I I I C I I I
E E K D E E E E E E Q E E E E E E C E E E
--------------------------------------------------------------
/11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75 \
TIE | 12
74 | TIE
TIE | 13
73 | VCC
TIE | 14
72 | TIE
TIE | 15
71 | TIE
GND | 16
70 | TIE
TIE | 17
69 | TIE
TIE | 18
68 | TIE
TIE | 19
67 | TIE
TIE | 20
66 | TIE
TIE | 21 XC9572-10-PC84
65 | TIE
VCC | 22
64 | VCC
TIE | 23
63 | TIE
TIE | 24
62 | TIE
TIE | 25
61 | TIE
TIE | 26
60 | GND
GND | 27
59 | TDO
TDI | 28
58 | TIE
TMS | 29
57 | TIE
TCK | 30
56 | TIE
TIE | 31
55 | TIE
TIE | 32
54 | TIE
\ 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 /
--------------------------------------------------------------
T T T T T V T T T G T T T T T T G T T T T
I I I I I C I I I N I I I I I I N I I I I
E E E E E C E E E D E E E E E E D E E E E
References
[1].Tusov G. I. “ Statistical theory of complex
signals receiving”, Moscow, " Sovetskoe Radio" 1977.
[2].Gallager R. “Information Theory and Reliable Communications” , Moscow,"
Sovetskoe Radio" 1974.
[3].The Programmable Logic Data Book, Xilinx, 1999
Technical College
- Bourgas,
All rights reserved, © March, 2000